|
1 Fundamentals 1
1.1 Impedance of Linear, Time-Invariant,
Lumped-Element Circuits 1
1.2 Power Ratios 2
1.3 Rules of Scaling. 5
1.3.1 Scaling of Physical Size.
6
1.3.1.1 Scaling Inductors
8
1.3.1.2 Scaling Transmission-Line Dimensions
8
1.3.2 Power Scaling.
9
1.3.3 Time Scaling
10
1.3.4 Impedance Scaling with Constant
Voltage 12
1.3.5 Dielectric-Constant Scaling
14
1.3.5.1 Partially Embedded Transmission
Lines 15
1.3.6 Magnetic Permeability Scaling
15
1.4 The Concept of Resonance.
16
1.5 Extra for Experts: Maximal Linear System Response
to a Digital Input 22
2 Transmission Line Parameters.
29
2.1 Telegrapher’s Equations.
31
2.1.1 So Good It Works on
Barbed Wire. 34
2.1.2 The
No-Storage Principle and Its Implications for
Returning Signal Current 35
2.2 Derivation of Telegrapher’s Equations.
38
2.2.1 Definition of Characteristic Impedance
ZC 39
2.2.2 Changes in Characteristic Impedance.
40
2.2.3 Calculation of Impedance Zc From
Parameters R, L, G, And C 41
2.2.4 Definition of Propagation Coefficient
g. 44
2.2.5 Calculation of Propagation Coefficient
g from Parameters R, L, G, and C
46
2.3 Ideal Transmission Line
48
2.4 DC Resistance. 55
2.5 DC Conductance. 57
2.6 Skin Effect 58
2.6.1 What Causes the Skin Effect, and What
Does It Have to Do With Skin? 58
2.6.2 Eddy Currents within a Conductor
61
2.6.3 High and Low-Frequency Approximations
for Series Resistance 63
2.7 Skin-Effect Inductance.
66
2.8 Modeling Internal Impedance.
67
2.8.1 Practical Modeling of Internal
Impedance 70
2.8.2 Special Issues Concerning Rectangular
Conductors. 73
2.9 Concentric-Ring Skin-Effect Model
75
2.9.1 Modeling Skin
Effect 76
2.9.2 Regarding
Modeling Skin Effect 79
2.10 Proximity Effect
79
2.10.1 Proximity Factor
81
2.10.2 Proximity Effect for Coaxial Cables
84
2.10.3 Proximity Effect for Microstrip and
Stripline Circuits 85
2.10.4 Last Words on Proximity Effect
85
2.10.4.1 Proximity
Effect II 85
2.10.4.2 2-D
Quasistatic Field Solvers 87
2.11 Surface Roughness. 90
2.11.1 Severity of Surface Roughness.
90
2.11.2 Onset of Roughness Effect
91
2.11.3 Roughness of Pcb Materials
91
2.11.4 Controlling Roughness.
92
2.12 Dielectric Effects.
94
2.12.1 Dielectric Loss Tangent
98
2.12.2 Rule of Mixtures
99
2.12.3 Calculating the Loss Tangent for a
Uniform Dielectric Mixture 101
2.12.4 Calculating the Loss Tangent When You
Don’t Know q 103
2.12.5 Causality and the Network Function
Relations 105
2.12.6 Finding |er| to Match a Measured Loss
Tangent 110
2.12.7 Kramers-Kronig Relations
114
2.12.8 Complex Magnetic Permeability.
115
2.13 Impedance in Series with the Return Path
115
2.14 Slow-Wave Mode On-Chip
117
3 Performance Regions.
121
3.1 Signal Propagation Model
121
3.1.1 Extracting Parameters for RLGC
Simulators 127
3.2 Hierarchy of Regions.
128
3.2.1 A Transmission Line
Is Always a Transmission Line 130
3.3 Necessary Mathematics: Input Impedance and
Transfer Function. 132
3.4 Lumped-Element Region
135
3.4.1 Boundary of Lumped-Element Region
136
3.4.2 Pi Model 137
3.4.3 Taylor-Series Approximation of H
(Lumped-Element Region) 139
3.4.4 Input impedance (Lumped-Element
Region) 140
3.4.5 Transfer Function (Lumped-Element
Region) 143
3.4.6 Step Response (Lumped-Element Region)
145
3.5 RC Region 148
3.5.1 Boundary of RC Region
149
3.5.2 Input Impedance (RC Region)
151
3.5.3 Characteristic Impedance (RC Region)
152
3.5.4 General Behavior within RC Region
153
3.5.5 Propagation Coefficient (RC Region)
155
3.5.6 Transfer Function (RC Region)
155
3.5.6.1 Propagation Function of RC Line with
Open-Circuited Load 155
3.5.6.2 Propagation Function of RC Line with
Matched End Termination 156
3.5.6.3 Propagation Function of RC Line with
Matched Source Termination 156
3.5.6.4 Propagation Function of RC Line with
Resistive End Termination 157
3.5.7 Normalized Step Response (RC Region)
157
3.5.8 Tradeoffs Between Distance and Speed
(RC Region) 159
3.5.9 Closed-Form Solution for Step Response
(RC Region) 159
3.5.10 Elmore Delay Estimation (RC Region)
160
3.6 LC Region (Constant-Loss Region)
166
3.6.1 Boundary of LC Region
166
3.6.2 Characteristic Impedance (LC Region)
167
3.6.3 Influence of Series Resistance on TDR
Measurements 169
3.6.4 Propagation Coefficient (LC Region)
173
3.6.5 Possibility of Severe Resonance within
the LC Region 176
3.6.5.1 Alternate Interpretation of Equation
[3.17] 178
3.6.5.2 Practical Effect of Resonance
179
3.6.6 Terminating an LC Transmission Line
179
3.6.6.1 End Termination
180
3.6.6.2 Source Termination
181
3.6.6.3 Both-Ends Termination
181
3.6.6.4 Subtle Differences Between
Termination Styles 181
3.6.6.5 Application of Termination Equations
to Other Regions 183
3.6.7 Tradeoffs Between Distance And Speed
(LC Region) 183
3.6.8 Mixed-Mode Operation (LC and RC
Regions) 184
3.7 Skin-Effect Region.
185
3.7.1 Boundary of Skin-Effect Region
185
3.7.2 Characteristic Impedance (Skin-Effect
Region) 186
3.7.3 Influence of Skin-Effect on TDR
Measurement 188
3.7.4 Propagation Coefficient (Skin-Effect
Region) 189
3.7.5 Possibility of Severe Resonance within
Skin-Effect Region 193
3.7.5.1 Subtle Differences Between
Termination Styles 194
3.7.5.2 Application of Termination Equations
to Other Regions 194
3.7.6 Step Response (Skin-Effect Region)
195
3.7.7 Tradeoffs Between Distance and Speed
(Skin-Effect Region) 199
3.8 Dielectric Loss Region.
200
3.8.1 Boundary of Dielectric-Loss-Limited
Region 200
3.8.2 Characteristic Impedance
(Dielectric-Loss-Limited Region) 202
3.8.3 Influence of Dielectric Loss on TDR
Measurement 205
3.8.4 Propagation Coefficient
(Dielectric-Loss-Limited Region) 206
3.8.5 Possibility of Severe Resonance within
Dielectric-Loss Limited Region 210
3.8.5.1 Subtle Differences Between
Termination Styles 211
3.8.5.2 Application of Termination Equations
to Other Regions 211
3.8.6 Step Response (Dielectric-Loss-Limited
Region) 212
3.8.7 Tradeoffs Between Distance and Speed
(Dielectric-Loss Region) 216
3.9 Waveguide Dispersion Region
216
3.9.1 Boundary of Waveguide-Dispersion
Region 217
3.10 Summary of Breakpoints Between Regions
218
3.11 Equivalence Principle for Transmission Media
221
3.12 Scaling Copper Transmission Media
224
3.13 Scaling Multimode Fiber-Optic Cables
229
3.14 Linear Equalization: Long Backplane Trace Example.
230
3.15 Adaptive Equalization: Accelerant Networks
Transceiver 234
4 Frequency-Domain Modeling.
237
4.1 Going Nonlinear.
237
4.2 Approximations to the Fourier Transform..
239
4.3 Discrete Time Mapping.
241
4.4 Other Limitations of the FFT
243
4.5 Normalizing the Output of an FFT Routine
243
4.5.1 Deriving the DFT Normalization Factors
244
4.6 Useful Fourier Transform-Pairs
245
4.7 Effect of Inadequate Sampling Rate.
247
4.8 Implementation of Frequency-Domain Simulation.
249
4.9 Embellishments
251
4.9.1
What if a Large Bulk-Transport Delay Causes the Waveform to
Slide Off the end of the Time-Domain Window?. 251
4.9.2 How Do I Transform an Arbitrary Data
Sequence? 251
4.9.3 How Do I Shift the Time-Domain
Waveforms?. 252
4.9.4 What If I Want to Model a More
Complicated System? 252
4.9.5 What About Differential Modeling?
252
4.10 Checking the Output of Your FFT Routine
253
5 Pcb (printed-circuit board) Traces.
255
5.1 Pcb Signal Propagation.
257
5.1.1 Characteristic Impedance and Delay
257
5.1.2 Resistive Effects
258
5.1.2.1 DC Resistance of Pcb Trace
258
5.1.2.2 AC Resistance of Pcb Trace
258
5.1.2.3 Calculation of Perimeter of Pcb
Trace 261
5.1.2.4 Very Low Impedance Pcb Trace
262
5.1.2.5 Calculation of Skin-Effect Loss
Coefficient for Pcb trace 262
5.1.2.6
Popsicle-Stick Analysis 262
5.1.2.7
Nickel-Plated Traces 266
5.1.3 Dielectric Effects
268
5.1.3.1 Estimating the Effective Dielectric
Constant for a Microstrip 269
5.1.3.2 Propagation Velocity
270
5.1.3.3 Calculating the Effective Loss
Tangent for a Microstrip 270
5.1.3.4 Dielectric Properties of Laminate
Materials (core and prepreg) 271
5.1.3.5 Variations
in Dielectric Properties with Temperature
275
5.1.3.6 Passivation and Soldermask
277
5.1.3.7 Dielectric Properties of Soldermask
Materials 280
5.1.3.8 Calculation of Dielectric Loss
Coefficient for Pcb Trace 280
5.1.4 Mixtures of Skin Effect and Dielectric
Loss 281
5.1.5 Non-TEM Modes
282
5.1.5.1 Strange
Microstrip Modes 282
5.1.5.2 Simulation of Non-TEM Behavior
286
5.2 Limits to Attainable Distance.
288
5.2.1 SONET Data
Coding 291
5.3 Pcb Noise and Interference.
294
5.3.1 Pcb: Reflections.
294
5.3.1.1 Both Ends
Termination 295
5.3.1.2 Pcb: Lumped-Element Reflections
297
5.3.1.3 Potholes
300
5.3.1.4 Inductive Potholes
303
5.3.1.5 Who’s
Afraid of the Big, Bad Bend? 304
5.3.1.6 Stubs and
Vias 305
5.3.1.7 Parasitic
Pads 306
5.3.1.8 How Close
Is Close Enough? 309
5.3.1.9 Placement
of End Termination 312
5.3.1.10 Making an
Accurate Series Termination 314
5.3.1.11 Matching
Pads 315
5.3.2 Pcb Crosstalk.
318
5.3.2.1 Purpose of Solid Plane Layers
318
5.3.2.2 Variations with Trace Geometry
318
5.3.2.3 Directionality
319
5.3.2.4 NEXT: Near-End or Reverse Crosstalk
320
5.3.2.5 FEXT: Far-End or Forward Crosstalk
321
5.3.2.6 Special Considerations
322
5.3.2.7
Directionality of Crosstalk 323
5.4 Pcb Connectors. 326
5.4.1 Mutual
Understanding 326
5.4.2 Through-Hole
Clearances. 328
5.4.3 Measuring
Connectors. 330
5.4.4 Tapered
Transitions. 332
5.4.5
Straddle-Mount Connectors. 335
5.4.6 Cable Shield
Grounding. 336
5.5 Modeling Vias
338
5.5.1 Incremental Parameters of a Via
338
5.5.2 Three Models for a Via
341
5.5.3 Dangling Vias.
343
5.5.4 Capacitance Data
345
5.5.4.1 Three-Layer Via Capacitance
345
5.5.4.2 Effect of Back-Drilling
346
5.5.4.3 Effect of Multiple Planes
347
5.5.5 Inductance Data
351
5.5.5.1 Through-Hole Via Inductance
351
5.5.5.2 Via Crosstalk
354
5.6 The Future of On-Chip
Interconnections 359
6 Differential Signaling.
363
6.1 Single-Ended Circuits.
363
6.2 Two-Wire Circuits. 368
6.3 Differential Signaling.
370
6.4 Differential and Common-Mode Voltages and
Currents 374
6.5 Differential and Common-Mode velocity
376
6.6 Common-Mode Balance
377
6.7 Common-Mode Range.
378
6.8 Differential to Common-Mode Conversion.
378
6.9 Differential Impedance.
380
6.9.1 Relation Between Odd-Mode and
Uncoupled Impedance 383
6.9.2 Why
the Odd-Mode Impedance Is Always Less Than the
Uncoupled Impedance. 383
6.9.3 Differential
Reflections. 384
6.10 Pcb Configurations. 385
6.10.1 Differential
(Microstrip) Trace Impedance. 386
6.10.2 Edge-Coupled Stripline
389
6.10.3 Breaking Up
a Pair 397
6.10.4 Broadside-Coupled Stripline
399
6.11 Pcb Applications. 404
6.11.1 Matching to an External, Balanced
Differential Transmission Medium 404
6.11.2 Defeating ground bounce
405
6.11.3 Reducing EMI with Differential
Signaling 405
6.11.4 Punching Through a Noisy Connector
407
6.11.4.1
Differential Signaling (Through Connectors)
408
6.11.5 Reducing Clock Skew
409
6.11.6 Reducing Local Crosstalk
411
6.11.7 A Good Reference about Transmission Lines
413
6.11.8 Differential
Clocks 413
6.11.9 Differential
Termination. 414
6.11.10
Differential U-Turn 417
6.11.11 Your
Layout Is Skewed 419
6.11.12 Buying
Time 420
6.12 Intercabinet Applications.
422
6.12.1 Ribbon-Style Twisted-Pair Cables
423
6.12.2 Immunity to Large Ground Shifts
424
6.12.3 Rejection of External Radio-Frequency
Interference (RFI) 426
6.12.4
Differential Receivers Have Superior Tolerance to Skin Effect and
Other High-Frequency Losses. 427
6.13 LVDS Signaling. 429
6.13.1 Output Levels.
429
6.13.2 Common-Mode Output
430
6.13.3 Common-Mode Noise Tolerance
430
6.13.4 Differential-Mode Noise Tolerance
431
6.13.5 Hysteresis
431
6.13.6 Impedance Control
432
6.13.7 Trace Radiation
435
6.13.8 Risetime
435
6.13.9 Input Capacitance.
435
6.13.10 Skew
435
6.13.11 Fail-Safe
436
7 Generic Building-Cabling Standards.
439
7.1 Generic Cabling Architecture.
442
7.2 SNR Budgeting. 446
7.3 Glossary of Cabling Terms
446
7.4 Preferred Cable Combinations.
449
7.5 FAQ: Building-Cabling Practices.
449
7.6 Crossover Wiring.
451
7.7 Plenum-Rated Cables.
452
7.8 Laying cables in an Uncooled Attic Space
453
7.9 FAQ: Older Cable Types
453
8 100-Ohm Balanced Twisted-Pair Cabling.
457
8.1 UTP Signal Propagation.
459
8.1.1 UTP Modeling
460
8.1.2 Adapting the Metallic-Transmission
Model 462
8.2 UTP Transmission Example: 10BASE-T..
465
8.3 UTP Noise and Interference.
471
8.3.1 UTP: Far-End Reflections.
471
8.3.2 UTP: Near-End Reflections.
475
8.3.2.1 UTP: (Structural) Return Loss
477
8.3.2.2 Modeling Structural Return Loss
480
8.3.3 UTP: Hybrid Circuits
481
8.3.4 UTP: Near-End Crosstalk
487
8.3.5 UTP: Alien crosstalk
490
8.3.6 UTP: Far-End Crosstalk
490
8.3.7 Power sum NEXT and ELFEXT
493
8.3.8 UTP: Radio-Frequency Interference.
493
8.3.9 UTP: Radiation
496
8.4 UTP Connectors. 497
8.5 Issues with Screening.
501
8.6 Category-3 UTP at Elevated Temperature.
502
9 150-Ohm STP-A Cabling.
505
9.1 150-W STP-A
Signal Propagation. 506
9.2 150-W STP-A
Noise and Interference. 506
9.3 150-W STP-A:
Skew.. 507
9.4 150-W STP-A:
Radiation and Safety 508
9.5 150-W STP-A:
Comparison with UTP. 509
9.6 150-W STP-A
Connectors. 509
10 Coaxial Cabling 513
10.1 Coaxial Signal Propagation.
515
10.1.1 Stranded Center-Conductors.
522
10.1.2 Why 50 Ohms?
523
10.1.3 50‑Ohm
Mailbag 526
10.2 Coaxial Cable Noise and Interference.
528
10.2.1 Coax: Far-End Reflected Noise
528
10.2.2 Coax: Radio Frequency Interference.
529
10.2.3 Coax: Radiation.
529
10.2.4 Coaxial Cable: Safety Issues
530
10.3 Coaxial Cable Connectors.
532
11 Fiber-Optic Cabling.
537
11.1 Making Glass Fiber 538
11.2 Finished Core Specifications.
539
11.3 Cabling the Fiber 541
11.4 Wavelengths of Operation.
543
11.5 Multimode Glass Fiber-Optic Cabling
544
11.5.1 Multimode Signal Propagation.
546
11.5.2 Why Is Graded-Index Fiber Better than
Step-Index?. 551
11.5.3 Standards for Multimode Fiber
552
11.5.4 What Considerations Govern the Use of
50‑micron Fiber? 554
11.5.5 Multimode Optical Performance Budget
555
11.5.5.1 Multimode Dispersion Budget
555
11.5.5.2 Multimode Attenuation Budget
566
11.5.6 Jitter
568
11.5.7 Multimode Fiber-Optic Noise and
Interference. 570
11.5.8 Multimode Fiber Safety.
571
11.5.9 Multimode Fiber with Laser Source.
571
11.5.10 VCSEL Diodes
573
11.5.11 Multimode Fiber-Optic Connectors
575
11.6 Single-Mode Fiber-Optic Cabling.
576
11.6.1 Single-Mode Signal Propagation.
577
11.6.2 Single-Mode Fiber-Optic Noise and
Interference. 578
11.6.3 Single-Mode Fiber Safety.
578
11.6.4 Single-Mode Fiber-Optic Connectors.
578
12 Clock Distribution.
579
12.1 Extra Fries, Please.
582
12.2 Arithmetic of Clock Skew
584
12.3 Clock Repeaters. 589
12.3.1 Active Skew Correction
593
12.3.2 Zero-Delay Clock Repeaters
594
12.3.3 Compensating for Line Length
595
12.4 Stripline vs. Microstrip Delay
596
12.5 Importance of Terminating Clock Lines.
599
12.6 Effect of Clock Receiver Thresholds.
601
12.7 Effect of Split Termination.
602
12.8 Intentional Delay Adjustments.
605
12.8.1 Fixed Delay
605
12.8.2 Adjustable Delays
607
12.8.3 Automatically Programmable Delays
609
12.8.4 Serpentine
Delays 610
12.8.5 Switchback Coupling
612
12.9 Driving Multiple Loads with Source Termination.
616
12.9.1 To Tee or Not To Tee
619
12.9.2 Driving Two
Loads 625
12.10 Daisy-Chain Clock Distribution
627
12.10.1 Case Study of Daisy-Chained
Clock 629
12.11 The
Jitters 634
12.11.1 When Clock Jitter Matters
636
12.11.1.1 Clock Jitter Rarely Matters within the Boundaries of a
Synchronous State Machine 636
12.11.1.2 Clock Jitter Propagation
636
12.11.1.3 Variance of the Tracking Error
640
12.11.1.4 Clock Jitter in FIFO-Based
Architectures 643
12.11.1.5 What Causes Jitter
644
12.11.1.6 Random and Deterministic Jitter
645
12.11.2 Measuring Clock Jitter
648
12.11.2.1 Jitter
Measurement 651
12.11.2.2 Jitter
and Phase Noise 654
12.12 Power Supply Filtering for Clock
Sources, Repeaters, and PLL Circuits 656
12.12.1 Healthy
Power 659
12.12.2 Clean
Power 661
12.13
Intentional Clock Modulation 663
12.13.1 Signal
Integrity Mailbag 665
12.13.2
Jitter-Free Clocks 667
12.14 Reduced-Voltage Signaling
668
12.15 Controlling Crosstalk on Clock
Lines 669
12.16 Reducing
Emissions 670
13 Time-Domain Simulation Tools and Methods.
673
13.1 Ringing in a New
Era. 673
13.2 Signal Integrity Simulation Process
674
13.2.1 How Much Modeling Do You Need?
676
13.2.2 What Happens After Parameter
Extraction?. 676
13.2.3 A Word of Caution
677
13.3 The Underlying Simulation Engine
678
13.3.1 Evolving Forward
680
13.3.2 Pitfalls of SPICE-Like Algorithms.
680
13.3.3 Transmission Lines
682
13.3.4 Interpreting Your Results.
684
13.3.5 Using SPICE Intelligently.
685
13.4 IBIS (I/O Buffer
Information Specification). 685
13.4.1 What Is IBIS?.
686
13.4.2 Who Created IBIS?
686
13.4.3 What Is Good About IBIS?.
687
13.4.4 What’s Wrong with IBIS?
687
13.4.5 What You Can Do to Help
688
13.5 IBIS: History and Future
Direction. 689
13.5.1 IBIS Historical Overview
689
13.5.2 Comparison to SPICE
690
13.5.3 Future Directions
690
13.6 IBIS: Issues with Interpolation.
691
13.7 IBIS: Issues with SSO Noise.
695
13.8 Nature of EMC Work. 697
13.8.1 EMC
Simulation. 698
13.9 Power and Ground Resonance.
699
Collected References. 703
Points to Remember. 710
Appendix A - Building a Signal
Integrity Department 731
Appendix B - Calculation of Loss Slope.
733
Appendix C - Two-Port Analysis.
735
Simple Cases Involving Transmission Lines.
737
Fully Configured Transmission Line.
739
Complicated Configurations. 741
Appendix D - Accuracy of Pi Model
743
Pi-Model Operated in the LC Region.
745
Appendix E - erf( ) 747 |
