2008 Signal Integrity Seminars

taught by Dr. Howard Johnson

High- Speed Digital Design  

Oxford Univ. 
NEW!!   Rochester, NY 
San Jose, CA 

  June 23 - 24
  September 29 - 30   NEW!!
  October 27 - 28
Advanced High-Speed Signal Propagation  

Oxford Univ. 
San Jose, CA 

  June 25 - 26
  October 29 - 30
High-Speed Noise and Grounding

San Jose, CA 

  November 3 - 4
 

 

Two Way Street

(Originally published in EDN Magazine, January 4, 2007)
 

Suppose that I gave you a highway-traffic monitor that reports total traffic density on a section of roadway but does not provide separate figures for eastbound and westbound traffic. Obviously, this sensor reveals only part of the total traffic picture. Transmission lines, like streets, support traffic in two directions. A voltage probe connected to a transmission line acts much like a traffic-density sensor. It shows an aggregate-voltage waveform but doesn't say which way the waveform is moving.

For example, Figure 1 shows the composite voltage (pink) at capacitor C3 (Eye of the Probe, EDN 12/1/2006). The waveform shows a 200-psec step followed by a negative bump at B. To decipher the cause of that bump, include in your schematic a virtual (nonphysical) 0Ω resistor, R0. Set all the parasitics associated with that component to their minimum values.

Export from your simulator both the voltage, v0, at R0 and the current, i0, flowing through R0. Then, use the equations in Figure 1 to compute both forward- and reverse-moving waveforms, vF and vR, respectively. The composite waveform at C3 is the sum of these two waveforms. The forward waveform (blue) appears ideal. The negative bump appears only in the reverse waveform (purple). Therefore, the bump must be a reflection coming from something to the right of C3.

Next, consider the shape and timing of the reflected bump. The bump duration is comparable with the signal rise time, so you may conjecture that it comes from one localized spot. The center of the bump occurs 400 psec after the midpoint of the initial rising edge. That 400-psec number is a round-trip reflection delay, so the imperfection you seek must be 200 psec downstream from R0. The only significant imperfection near that location is the receiver-load capacitance, C4. If you remove C4 from the circuit, the bump disappears, confirming C4 as the source of the bump. A thorough examination of vR reveals a second negative bump, smaller than the first, coincident with the main signal edge. That reflection comes from the C3.

If this technique seems new or unusual to you, think back to when you were a little kid. Didn't your mother tell you to look both ways?

All Publications by Dr. Howard Johnson except as noted.
Signal Integrity Training Classes taught exclusively by Dr. Howard Johnson - for full schedule, see www.sigcon.com
© 1993-2007 Signal Consulting, Inc. All rights reserved. • site map